International Symposium on System-on-Chip
SoC | 1999 | 2000 | 2001 | 2002 | 2003 | 2004 | 2005 | 2006 | 2007 | 2008 | 2009 | 2010 | 2011 | 2012 | 2013 | 2014 | 2015



Lodging / Travel

Valid XHTML 1.1

Valid CSS!

Sharad Malik
Sharad Malik

Professor, Princeton University

Sharad Malik received the B. Tech. degree in Electrical Engineering from the Indian Institute of Technology, New Delhi, India in 1985 and the M.S. and Ph.D. degrees in Computer Science from the University of California, Berkeley in 1987 and 1990 respectively.

Currently he is Professor in the Department of Electrical Engineering, Princeton University. His current research interests are: design tools for embedded computer systems, synthesis and verification of digital systems.

He has received the President of India's Gold Medal for academic excellence (1985), the IBM Faculty Development Award (1991), an NSF Research Initiation Award (1992), Princeton University Rheinstein Faculty Award (1994), the NSF Young Investigator Award (1994), Best Paper Award at the IEEE International Conference on Computer Design (1992) and at the ACM/IEEE Design Automation Conference (1996), the Walter C. Johnson Prize for Teaching Excellence (1993) and the Princeton University Engineering Council Excellence in Teaching Award (1993, 1994, 1995). He serves/has served on the program committees of DAC, ICCAD and ICCD. He is serving as the technical program co-chair for DAC in 2000 and 2001. He is on the editorial boards of the Journal of VLSI Signal Processing and Design Automation for Embedded Systems.

Monica Lam
Monica Lam

Monica Lam is a Professor of Computer Science at Stanford University. She joined the faculty of Stanford in 1988, after receiving a Ph.D. in Computer Science from Carnegie Mellon University. She took a sabbatical leave from Stanford in 1998 to help start Tensilica Inc., a company that specializes in configurable processor cores.

Prof. Lam's previous research projects include the architecture and compiler for the CMU Warp machine, a systolic array of VLIW processors, and the Stanford DASH distributed shared memory machine. She headed the SUIF compiler research group at Stanford, which produced the most popular research compiler infrastructure in use. Many of the compiler techniques she developed (software pipelining, cache locality optimizations, interprocedural parallelization) have been adopted by the industry.

Prof. Lam received an NSF Young Investigator award in 1992. She chaired the Hot Chips Conference in 1999 and the ACM SIGPLAN Programming Languages Design and Implementation Conference in 2000. She has served on numerous conference program committees including ASPLOS, ISCA, PLDI, POPL, and SOSP, and on the Editorial Board of ACM Transactions on Computer Systems since 1994.

Hannu Tenhunen
Hannu Tenhunen

Professor, KTH (Royal Institute of Technology)

Hannu Tenhunen received degrees of Diploma Engineer in Electrical Engineering and Computer Engineering from Helsinki University of Technology, in 1982, and Ph.D. in Electrical Engineering from Cornell University, Ithaca, NY, USA, in 1985. During 1978-82 he was with Electron Physics Laboratory, Helsinki University of Technology. From 1983 to 1985 he worked at Cornell University and its National Submicron Facility as a Fulbright scholar. From September 1985 he started at Tampere University of Technology, Applied Electronics and later at Signal Processing Laboratory as an associate professor with duties in setting up the LSI and VLSI design activities and to integrate DSP and VLSI activities together. He was also the coordinator (program director) of National Microelectronics Program of Finland during 1987-91. He also worked as Head of Laboratory of Signal Processing Laboratory. From November 1989 he worked as research professor on ASIC design methodologies and applications. This chair was financed by industry. Since January 1992 he has been with Royal Institute of Technology (KTH), Stockholm, where he is a professor of electronic system design and head of ESDlab. During his time at KTH he has initiated and/or being a founding member and proposal writer for several large scale national programs and graduate schools. Professor Tenhunen has also contributed as an evaluator of national research and educational programs in Europe and European Union research projects and programs.

His educational interests are within VLSI, future technology abstraction, circuit design paradigms, and related system applications, and continuing education towards industries. His current activities are focused in establishing internationally competitive educational program within the new KTH-Kista Information Technology program with main focus on modern electronic design and System-on-Chip curriculum issues.

His current research interests are ULSI/SoC circuits and systems for wireless and broadband communication, and related system design methodologies. He has made over 290 reviewed international publications on IC technologies and VLSI systems worldwide, and over 120 national publications/presentations. He has 15 patents granted worldwide. He is actively contributing to many international conferences as general chairman, session chairman, technical program committee member, invited speaker or presenting papers. He is e.g. technical program committee member of International Solid State Circuit Conference (ISSCC) (from 1989 forward), general chairman of European Solid-State Circuits Conference in 2000, and a long standing chairman of the successful IEEE NORCHIP series of Nordic conferences for the circuit design community.

In addition of technical interest, he has been active in technology policies in Finland and Sweden. In addition to his position at KTH, he is holding the positions of Docent in Digital Systems at Tampere University of Technology (since 1992), Visiting Professor in mixed signal systems, Cornell University, School of Electrical Engineering, Ithaca, NY, USA (1998), Docent in Digital Circuit Techniques and Digital System Design, Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland (since 1999) and Part-time Visiting Professor of Electronics at University of Turku, Finland (since 1999).

Roger A. Bringmann
Roger Bringmann

Roger A. Bringmann earned a B.S. in Computer Science from the University of South Alabama in 1983 and an M.S. and Ph.D. from the University of Illinois at Urbana/Champaign in 1992 and 1994 respectively. His research focus was on control and data speculation and instruction scheduling for superscalar and VLIW microprocessors. He is curently the Directory of Software Development Tools at StarCore, a joint design center between Lucent Technologies and Motorola focusing on the development of DSP architectures, cores, compilers for next generation DSPs. He has had significant experience in the development of technologies and products focused at high-performance embedded systems since 1983.

Mark R. Pinto
Mark Pinto

Platform Technology Vice President and Chief Technical Officer, Lucent Technologies

Dr. Mark Pinto is the Chief Technical Officer of the Lucent Microelectronics Group, a position he has held since September 1997. As CTO, Dr. Pinto is responsible for Microelectronics' technology strategy and Bell Laboratories' research and development activities related to integrated circuits and optoelectronics components. Dr. Pinto also is the Platform Technologies Vice President, where he is responsible for leading the company's efforts to deliver system-on-a-chip hardware cores, development software, methodologies, tools, models and analysis.

Dr. Pinto has been with Bell Laboratories since 1985. Before joining Lucent Microelectronics, he was Director of the Silicon Electronics Research Laboratory in the Bell Laboratories Research Division. He was selected as a Bell Laboratories Distinguished Member of Technical Staff in 1991 and a Bell Labs Fellow in 1995, both for work in semiconductor device physics and computational simulation. Dr. Pinto has authored or co-authored more than 150 journal and professional conference papers and has eight patents in semiconductor devices. He is a Fellow of the IEEE and was elected as a member of the engineering honor societies Tau Beta Pi and Eta Kappa Nu.

Dr. Pinto received bachelor's degrees in electrical engineering and computer science from Rensselaar Polytechnic Institute, and a master's degree and doctorate in electrical engineering from Stanford University. As part of his doctoral work at Stanford, Dr. Pinto developed the semiconductor device simulation program PISCES-II, which has been a standard tool in the integrated circuit industry for more than a decade.

Evan E. Davidson
Evan Davidson

Evan Davidson is a Distinguished Engineer at IBM's facility in Poughkeepsie, New York. He has been a practicing engineer for 38 years. During this period, he has done circuit design, chip physical design, electrical package design and high performance technology applications work. For the last 20 years, Evan has coordinated the efforts of system designers and technology designers as a catalyst for choosing optimized global product design points. During the '70s and '80s, he was quite involved with IBM's ceramic MCM technology for mainframes at IBM's East Fishkill location.

During his career, Mr. Davidson has given scores of presentations, written many articles and book chapters on the subjects of package design and signal integrity. He holds 12 patents. He is also a Senior Member of the IEEE and a member of IMAPS. He is a graduate of Rensselaer Polytechnic Institute and New York University with a BSEE and MSEE, respectively. Evan is also a member of the Eta Kappa Nu and Tau Beta Pi Honorary Engineering Societies.

Steven Guccione
Steven Guccione

Steven Guccione is a Staff Engineer at Xilinx. His interests are in high performance computing, in particular software tools for reconfigurable computing. Dr. Guccione received his B.S. degree in Electrical and Computer Engineering from Boston University, his M.S. degree in Electrical Engineering from the University of Minnesota and his Ph.D. degree in Electrical Engineering from the University of Texas at Austin. Dr. Guccione has previously held engineering positions at Texas Instruments, Honeywell, Advanced Micro Devices, IBM, MCC/Motorola and has consulted for several smaller companies.

David Strube
David Strube

Chief Technical Officer at BOPS, Inc.

Dr. Strubé has extensive experience in software and computer product development, Engineering for multimedia systems development, DSP software algorithm design, parallel programming and DSP and communications systems architectures. Dr. Strube has 20 years of industry experience including 13 years at IBM. Dr. Strubé was instrumental in the development and delivery of the Mwave DSP processor while at IBM, creating the first DSP integrated into a PC platform that performed both media and communication functions (Thinkpad(tm) for soundcard/modem).

Dr. Strubé is a Registered Professional Engineer and a graduate of the US Naval Academy and the Naval Postgraduate School, with undergraduate degrees in Physics and Systems Engineering, and a doctorate in Applied Mathematics.

Yves Masse
Yves Masse

Yves Masse received his BS with Ecole Nationale Superieure des Telecommunications in Paris (1976) and his PhD from U.C.L.A. in 81. He joined TI in 1983 where he started as Application Engineer for speech and DSP products. He then focused on wireless systems and wireless applications and supported TI DSPs for wireless applications. He is now responsible for the European Wireless Application Team in Nice. His team defines and supports TI baseband platform for Modem and Application. The platform consists of processors, System on chip tools and software building blocks. The team also defines and supports the current Open Multimedia Application Platform and also develops speech and Multimedia software on this platform.

Andrew Jones

Andrew Jones is the Systems Architecture Manager at STMicroelectronics in Bristol UK, where he is responsible for architectural specification and modelling of superintegrated chips using the SHx family of cores. Previously he was a lecturer and researcher in Computer Science at the University of Bristol. He is author of a book on the design of high-speed networks and has published a number of technical papers. He has filed over 20 patents in the area of system-on-chip architectures. Jones holds a BSc in Physics and a PhD in Computer Architecture from the University of Bristol, England.

Roger Shepherd

Roger Shepherd is the Manager of Advanced Architecture at STMicroelectronics in Bristol UK. He is responsible for the the Lx VLIW processor project. Previously has worked on the architecture of the INMOS Transputers and the software tool development manager for a 64-bit processor project. He has a number of patents in the field of computer architecture and was recently awarded STMicroelectronics Exceptional Patent Award.

Joachim Kunkel
Joachim Kunkel

Joachim Kunkel is the VP/GM of the System Level Design business unit of Synopsys Inc., Mountain View, California, which develops and markets the CoCentric(tm) system level design product family. Joachim's business unit is also responsible for the COSSAP and Behavioral Compiler products and has been a key contributor to the Open SystemC Initiative from the very beginning.

Prior to joining Synopsys Joachim was a managing director of CADIS GmbH, a company he had co-founded in 1989 in Aachen, Germany. CADIS GmbH focused on the development of system level design tools for digital signal processing and providing specialized design services for wireless communication systems.

From 1984 to 1989 Joachim was a research assistant at the Aachen University of Technology's 'Lehrstuhl fuer Elektrische Regelungstechnik', where he conducted research in the area of system level simulation techniques for digital signal processing, with special emphasis on parallel computing.

Joachim Kunkel received a 'Dipl.-Ing. der Nachrichtentechnik' degree from the Aachen University of Technology, Aachen, Germany in 1984.

Wolfgang Hoeflich

Wolfgang Hoeflich is Sr. Applications Manager at Chameleon Systems, San Jose, CA. Before that, he was Applications Manager at Aptix Corporation, San Jose and Munich, Germany, where he supported customers in the verification of wireless applications on FPGA-based rapid prototyping platforms. Prior to Aptix, he was Applications Engineer with Xilinx in San Jose. Wolfgang has about 10 years of experience in Applications Engineering with the focus on ASIC/FPGA design flows, and methodologies for the verification of complex systems. Wolfgang holds a MSEE degree from the Fachhochschule Munich, Germany.