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Tutorial on Nov. 14, 2005

The status of the Network-on-Chip revolution: design methods, architectures and silicon implementation

Organizer: Davide Bertozzi, University of Ferrara, Italy

Location: Hall A, Tampere Hall, Yliopistonkatu 55, Tampere

Tutorial Schedule:

9:00  Davide Bertozzi - University of Ferrara
      The road to NoCs: evolving bus protocols and topologies
9:45  Davide Bertozzi
      NoC basics
10:30 coffee
11:00 Davide Bertozzi
      Overview of NoC architectures
12:00 Robert Mullins - University of Cambridge
      Asynchronous vs Synchronous design techniques for NoCs

13:00 lunch

14:30 Se-Joong Lee - KAIST Korea
      NoC Silicon implementation issues
15:30 coffee
16:00 Srinivasan Murali - Stanford University
      NoC design methodologies
17:00 Final discussion
17:15 End


  • Davide Bertozzi, Assistant Professor, University of Ferrara, Italy
  • Robert Mullins, Senior Research Associate, Rainbow Research Group, University of Cambridge, UK
  • Se-Joong Lee, PhD, Research Assistant, Semiconductor System Laboratory, KAIST, Korea
  • Srinivasan Murali, Research Assistant, Digital Systems CAD group, Stanford University, USA

Tutorial Description:

Since we have been talking about NoCs for quite a long time, we would now like to present how early NoC ideas and architectural templates are evolving, paving the way for an effective industrial deployment. The tutorial will start by recalling basic principles and concepts that are at the basis of networks on chip, and by showing why state-of-the-art system interconnects are evolving toward this new communication architecture paradigm. Then, the tutorial will present the evolutionary path from early NoC prototypes to the most recently proposed architectures. However, as time goes on, design methods for actual NoC deployment are being developed and tested, and they will be addressed by one of the lectures. Moreover, some research teams start having early silicon implementation experience, which will be the topic of another lecture. The tutorial will be closed by pointing out the most critical issues and challenges designer teams are facing to come up with NoC realizations of practical utility.