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Tutorial at SoC 2007

Monday, November 19, 2007

Processor Design: System-on-Chip Computing for ASICs and FPGAs

09:00-09:45Introduction to embedded system processor architectures
(Prof. Jari Nurmi, TUT, Finland)
09:45-10:30Fallacies and pitfalls in processor design
(Steve Leibson, Tensilica, USA)
Coffee break
11:00-11:45Processor design flow and RISC processor design case
(Prof. Jari Nurmi, Dr Tapani Ahonen, TUT; Finland)
11:45-12:30VLIW DSP processor design for mobile communication applications
(Dr Christian Panis, Catena Radio Design, The Netherlands)
13:30-14:15Configurable processors and processor configuration in SoC design
(Steve Leibson, Tensilica, USA)
14:15-15:30Run-time reconfigurable processors
(Dr Fabio Campi, STMicroelectronics, Italy)
Coffee break
16:00-16:45Software-based self-testing of processors
(Prof. Dimitris Gizopoulos, University of Piraeus, Greece)
16:45-17:00Outlook to future, remaining Q & A, closing
(Prof. Jari Nurmi, TUT, Finland)

The first 50 registered tutorial participants will get the book Jari Nurmi (Ed.), Processor Design: System-on-Chip Computing for ASICs and FPGAs, which constitutes the tutorial material. The book also covers, e.g., DSP processors, co-processor design, soft-core processors for FPGAs, Java co-processor architecture, protocol processor design issues, stream multicore processors, clock generation and distribution, clockless/asynchronous processors, system-level modeling of processors, early estimation models, and programming tools for reconfigurable processors.