This paper presents energy and bandwidth aware topological mapping of Intellectual Properties (IPs) onto regular tile-based Network-on-Chip (NoC) architectures. Oneone mapping as well as many-many mapping are being taken in to consideration between switches and tiles in the proposed approach. In view of minimizing energy and link bandwidth requirements of the NoC-based designs, the approach focuses both the computational and communication synthesis. A Multi-Objective Genetic Algorithms (MOGA) based technique is used to find optimal solution from the pareto-optimal solutions. The proposed MOGA based technique has been implemented and evaluated for randomly generated benchmarks as well as real-life applications like multi-media system (MMS). The experimental results demonstrate savings up to 70%of energy and 20%of the link bandwidth. These results include performance evaluation of Many-Many vs. One-One mapping which clearly shows the effectiveness of the proposed approach.