International Symposium on System-on-Chip
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Accepted papers to SoC 2009

12           A Checkpoint/Restore Framework for SystemC-Based Virtual Platforms
69           A DSP architecture optimized for wireless baseband
52           A Multi-Core Signal Processor for Heterogeneous Reconfigurable Computing
16           Adaptive Circuit Block Model for Power Supply Noise Analysis of Low
             Power System-on-Chip
58           Analysis of Memory Access Optimization for Motion Compensation Frames
             in MPEG-4
14           Automated Instrumentation of FPGA-based Systems for System-level 
             Transaction Monitoring
9            Automatic Generation of Memory Interfaces
36           Building Asynchronous Routers with Independent Sub-Channels
62           Characterising Embedded Applications using a UML Profile
33           Dynamic Workload Peak Detection For Slack Management
65           Efficient Software Cache for H.264 Motion Compensation
28           Energy and Bandwidth Aware Mapping of IPs onto Regular NoC
             Architectures Using Multi-Objective Genetic Algorithms
38           Evaluation of Static and Dynamic Task Mapping Algorithms in 
             NoC-Based MPSoCs
6            Fault-Tolerant Communication over Micronmesh NOC with 
             Micron-Message Passing Protocol
51	     Flexible DOR Routing for Virtualization of Multicore Chips
3            Impact of Device Variability in the Communication Structures for 
             Future Synchronous SoC Designs
45           Instruction Merging to Increase Parallelism in VLIW Architectures
5            Mapping of the FFT on a Reconfigurable Architecture targeted to 
             SDR Applications
46           Minimizing area costs in GPS applications on a programmable DSP
             by code compression
11           Multi-compartment: A new architecture for secure co-hosting on SoC
70           On the Performance of 3GPP LTE Baseband Using SB3500
19           Parameterizing Simulated Annealing for Distributing Kahn Process 
             Networks on Multiprocessor SoCs
68           Pathfinding: A design methodology for fast exploration and 
             optimization of 3D-stacked integrated circuits
26           Performance Analysis of LTE Protocol Processing on an ARM based 
             Mobile Platform
25           Performance Analysis of Multi-Channel Memories in Mobile Devices
48           Performance Modeling of Parallel Applications on MPSoCs
30           Physical realization oriented area-power-delay tradeoff exploration
57           RTL-to-Layout Implementation of an Embedded Coarse Grained 
             Architecture for Dynamically Reconfigurable Computing in Systems-on-Chip
49           Scheduling Framework for Real-time Dependable NoC-Based Systems
2            Simultaneous PVT-Tolerant Voltage-Island Formation and Core 
             Placement for Thousand-Core Platforms
63           Soft NMR: Exploiting Statistics for Energy-Efficiency
44           System Architecture for 3GPP LTE Modem using a Programmable 
             Baseband Processor
31           Testing and Diagnosis of Faults in Template-Based Asynchronous Circuits
37           Two Phase Clocked Adiabatic Static CMOS Logic
50           Yield-oriented Evaluation Methodology of Networks-on-Chip Routing