Parameterized Decompression HW for a Program Memory Compression System

Piia Saastamoinen and Jari Nurmi

Tampere University of Technology, Department of Computer Systems

Abstract

Rapidly evolving digital consumer electronics markets and application demands are pushing more functionality to software, increasing also requirements for memory capacity of systems. There have been efforts for reducing the need for memories by for example compressing the program code, in order to reduce program memory footprint. We have previously introduced an effective code compression scheme, and in this paper, we present parameterized and flexible decompression hardware for decoding the compressed instructions. On-chip hardware and decoding tables, that are used to store compressed operands, bring only about 3% reduction to the compression ratio, which is 53% at best.