H.264/AVC framework for multi-core embedded video encoders

Tiago Dias1,  Nuno Roma2,  Leonel Sousa2

1ISEL-PI Lisbon, INESC-ID Lisbon / IST-TU Lisbon, 2INESC-ID Lisbon / IST-TU Lisbon

Abstract

A highly modular framework for developing parallel H.264/AVC video encoders in multi-core systems is presented. Such framework implements an efficient hardware/software co-design methodology, which enables replacing the software implementation of any operation in the video encoder application by a corresponding system call to a hardware accelerator. To achieve such goal, this design strategy adopts a simple and straightforward method to model all functional blocks of the video encoder into self-contained software modules. Such method takes into consideration not only the data structures required to implement the considered operations, but also the available interface of the target hardware structure. To prove the validity of the proposed framework, an implementation of a multi-core H.264/AVC video encoder using an ASIP IP core as a ME hardware accelerator is presented. The obtained results evidence the advantages of this methodology and demonstrate the performance gains it can provide. For the considered system, speedup factors greater than 15 were obtained for the ME operation.