Automatic Selection of Efficient Observability Points in Combinational Gate Level Circuits Using Particle Swarm Optimization

Amirali Ghofrani,  Fatemeh Javaheri,  Saeed Safari,  Zainalabedin Navabi

university of tehran


The process of testing digital designs is getting more complex everyday due to the growth in the size of these circuits. This complexity leads to more complicated logic cones, which results in harder to control and observe nodes in digital circuits. Reduced controllability and observability will decrease circuit's fault coverage, resulting in harder to test circuits. Addition of test points, which adds abilities to control and observe a node, can give the test engineer direct access to these locations. On the other hand, addition of more observability points is more economical in terms of silicon area than adding control points. Still, extra observability points must be carefully chosen for optimized hardware overhead and better fault coverage. In this paper, we select the minimal set of observability points to obtain the maximum coverage. For this purpose, a novel method based on particle swamp optimization (PSO), which is a bio-inspired optimization algorithm is adopted that automatically selects the most efficient observation points in order to increase the fault coverage. One should note that this is an offline method which is performed only once for each circuit.