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Lodging / Travel
Tutorial at SoC 2013
Tuesday, October 22, 2013
Room Sonaatti, Tampere Hall, from 9:00 to 17:00
Many-Core Chips: The New High-Performance Computing Platform
The speakers include:
Scaling as we know it is taking a different direction from the last three decades. Chips with tens of billions of transistors and hundreds of cores are expected to be the future of scaling. These chips will achieve performance through parallelism and application specific optimized cores. This trend will use superior technologies to integrate more cores on a chip rather than to push the frequency envelope as in the past. It is expected that every aspect of design and analysis will need to be modified to accommodate this new platform and trend. There is a clear need for new CAD tools and design methodologies that are very different from existing tools in both their focus and scope.
This talk will delve into the specific challenges with respect to both design and CAD that is required for these many core chips. The talk will also provide an overview into the market and technology factors guiding and driving this trend. Attendees will be provided with insight into both present and future research vectors to support this nascent exponential.
In addition, we will address some particular issues in manycore platforms, including hardware thread-level parallelism support in manycore architectures, and cyber-physical system design using the platforms.
09:00-09:45 Lecture 1 (Yehea Ismail) 09:45-10:30 Lecture 2 (Yehea Ismail) 10:30-11:00 Coffee break 11:00-11:45 Lecture 3 (Yehea Ismail) 11:45-12:30 Lecture 4 (Yehea Ismail) 12:30-13:30 Lunch 13:30-14:15 Lecture 5 (Roberto Giorgi) 14:15-15:00 Lecture 6 (Roberto Giorgi) 15:00-15:30 Coffee break 15:30-16:15 Lecture 7 (Tapani Ahonen) 16:15-17:00 Lecture 8 (Tapani Ahonen) 17:00-18:00 Reception in front of Sonaatti